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SUNNYVALE, Calif. (Map) -
(Logo: http://www.newscom.com/cgi-bin/prnh/20060118/SFW077LOGO)
Manufacturing efficiencies resulting in increased output in its Austin, Texas Fab25 and Aizu-Wakamatsu, Japan-based SP1 fab are expected to allow Spansion to reduce its dependencies on outside foundry support, particularly for 90nm product. In addition, new testing capabilities are resulting in significant increases in both throughput and yield, specifically on 65nm products including the company's leading-edge MirrorBit(R) technology Flash memory products.
"Last year, Spansion committed to reducing dependencies on external foundry sources and streamlining our own manufacturing and test capabilities, with the ultimate goal being significant cost savings," said Bertrand Cambou, president and CEO, Spansion Inc. "With the exceptional performance of our worldwide manufacturing and engineering teams, we have met that challenge and are committed to continuing to prove our ability to lead in this highly competitive field."
In addition to Spansion's internal manufacturing focus, the company plans to continue its long-term partnership strategy with a select group of subcontractors, such as ChipMOS for wafer sort and SMIC for wafer foundry. The SMIC agreement is expected to result in 65nm, 300mm wafers being produced before the end of fiscal 2008.
Manufacturing Excellence
In Austin, Texas, Spansion's Fab25 continues to exceed the company's
expectations in both yield and output on its 90nm products. At the same time,
SP1 in
SP1 is co-located in Aizu-Wakamatsu,
Test Efficiency
Spansion has also been developing new capabilities for wafer-level testing and built-in self test (BIST), designed for integration with 65nm lines. The implementation of these capabilities is expected to result in higher throughput, increased yields and lowered costs. By integrating these leading- edge testing capabilities into its existing facilities, Spansion has reduced its dependencies on external test vendors, which has resulted in cost reductions.
Wafer-level testing streamlines the overall testing process by conducting electrical testing while the die are still in wafer form, reducing the amount of time spent on identifying design or processing problems. Specifically designed to reduce costs associated with testing, BIST reduces both the test cycle duration and the complexity of the test set-up, which directly reduces the need for automated test equipment (ATE). These advanced techniques for testing provide faster, more accurate measurement results, providing an increased return on investment.
About Spansion
Spansion (Nasdaq: SPSN) is a leading Flash memory solutions provider, dedicated to enabling, storing and protecting digital content in wireless, automotive, networking and consumer electronics applications. Spansion, previously a joint venture of AMD and Fujitsu, is the largest company in the world dedicated exclusively to designing, developing, manufacturing, marketing and selling Flash memory solutions. For more information, visit http://www.Spansion.com.
Spansion(R), the Spansion Logo(R), MirrorBit(R), ORNAND(TM), ORNAND2(TM), HD-SIM(TM) and combinations thereof, are trademarks of Spansion LLC. Spansion, the Spansion Logo and MirrorBit are registered in the US and other countries. Other names used are for informational purposes only and may be trademarks of their respective owners.
Cautionary Statement
This release contains forward-looking statements that are made pursuant to
the safe harbor provisions of the Private Securities Litigation Reform Act of
1995, including statements regarding the expectation of a cost savings of
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